1. Field of the Invention
The present invention relates to structures for protecting integrated circuits against electrostatic discharges.
2. Discussion of the Related Art
FIG. 1 is a simplified top view of an integrated circuit chip. The integrated circuit comprises a central portion 1 connected to a set of metal pads 3 arranged at the chip periphery and intended to ensure connections to the outside. Central portion 1 comprises all the components enabling the integrated circuit to perform desired functions. Some of pads 3 are intended to receive high (VDD) and low (VSS) supply voltages. High and low supply rails 5 and 7 are generally provided all around the circuit. The other pads 3 are especially intended for receiving and/or for providing input-output signals. The entire circuit is covered with an insulating layer which only leaves access to terminals connected to pads 3, and may be placed in a package comprising lugs at pads 3 or balls connected to these lugs.
Such a circuit generally receives and/or provides signals of low voltage level (for example, from 0.6 to 3 V) and low current intensity (for example, from 1 μA to 10 mA), and may be damaged when overvoltages or overintensities occur between pads of the package. Overvoltages may occur during the manufacturing or assembly phase, before the circuit is assembled in a device (for example, on a printed circuit board), during electrostatic discharges linked to the handling of the circuits by tools or by hand. Such overvoltages may reach several thousands of volts and destroy circuit elements.
It is thus provided to associate with each pad 3 a protection structure which generally takes up a ring-shaped area 9 arranged between pads 3 and central portion 1 of the chip. The protection structure must be able to rapidly remove significant currents, that may appear when an electrostatic discharge occurs between two pads or two terminals of the package.
FIG. 2 shows an example of a protection structure 10, associated with an input-output pad 3 of an integrated circuit. A diode 11 is forward-connected between pad 3 and high supply rail 5. A diode 13 is reverse-connected between pad 3 and low supply rail 7. A MOS transistor 15, used as a switch, is connected between high and low supply rails 5 and 7. An overvoltage detection circuit 17, connected in parallel with MOS transistor 15, provides this transistor with a turn-on signal. Overvoltage detection circuit 17 may for example be an edge detector comprising a resistor in series with a capacitor, the connection node between the resistor and the capacitor switching state in case of an abrupt overvoltage. MOS transistor 15 especially comprises a parasitic diode 16 forward-connected between rail 7 and rail 5.
The operation of the protection structure in case of an overvoltage occurring on an input-output pad (now simply called “pad”) or on a pad connected to a supply rail (now simply called “rail”) will be indicated hereafter.
In normal operation, when the chip is supplied, the signals on pads 3 and rails 5 and 7 are such that diodes 11 and 13 conduct no current and detection circuit 17 turns MOS transistor 15 off.
In case of a positive overvoltage between high and low supply rails 5 and 7, circuit 17 turns on transistor 15, which enables to remove the overvoltage.
In case of a negative overvoltage between high and low supply rails 5 and 7, diode 16 becomes conductive and the overvoltage is removed.
In case of a positive overvoltage between a pad 3 and high supply rail 5, diode 11 becomes conductive and the overvoltage is removed.
In case of a negative overvoltage between pad 3 and rail 5, circuit 17 turns on transistor 15, and the overvoltage is removed through transistor 15 and diode 13.
In case of a positive overvoltage between a pad 3 and low supply rail 7, diode 11 becomes conductive and the positive overvoltage is transferred onto high supply rail 5, which corresponds to the above-discussed case of a positive overvoltage between rails 5 and 7.
In case of a negative overvoltage between a pad 3 and low supply rail 7, diode 13 becomes conductive and the overvoltage is removed.
In case of a positive or negative overvoltage between two pads 3, diodes 11 or 13 associated with the concerned pads turn on, and the overvoltage is transferred to high and low supply rails 5 and 7. This corresponds to one of the above-discussed overvoltage cases.
A disadvantage of such a protection structure lies in the fact that, to be able to drain off the currents induced by electrostatic discharges, diodes 11 and 13 and transistor 15 must have a significant surface area (typically, a junction perimeter of 200 μm per diode and a gate width of 4,000 μm per transistor). As a result, ring-shaped area 9 (FIG. 1) takes up a significant silicon surface area, to the detriment of central portion 1 of the chip. Further, due to its large size, MOS transistor 15 in the off state is crossed by significant leakage currents, which increases the circuit consumption.
Further, diodes 11 and 13 and transistor 15 are separate components, which complicates the manufacturing of ring-shaped area 9. The separate components must further be isolated from one another, which increases the total silicon surface area of an integrated circuit.
Such a structure also has the disadvantage of reacting differently according to the type of overvoltage generated by an electrostatic discharge. Indeed, the paths for draining off the current differ according to the features of the overvoltages applied across the circuit.
Further, with such a protection structure, the amplitude of the input-output signals is limited to values ranging between low supply voltage VSS minus the threshold voltage of diode 13 and high supply voltage VDD plus the threshold voltage of diode 11. Outside this range of values, the diodes become conductive and the circuit can no longer operate properly.
FIG. 3 illustrates another example of a structure for protecting several pads of an integrated circuit. Instead of using one MOS protection transistor 15 for each pad 3 of the circuit, as described hereabove in relation with FIG. 2, a single MOS transistor 15 may be used to remove the overvoltages linked to several pads 3 of the circuit. One MOS transistor for from three to ten pads 3 of the circuit may for example be used. Only diodes 11 and 13 are repeated at each pad 3. A disadvantage of this structure is that, if an electrostatic discharge occurs between two pads remote from transistor 15 and from detection circuit 17, the overvoltage removal path is relatively long. Since the current induced by the discharge may be very strong, the resistivity of the rails creates a significant voltage between the pads. The overvoltage is thus poorly removed and risks damaging the circuit.